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Dr. Doaa Abdelfatah Ashmawy :: Publications:

New area record for the AES combined S-box/inverse S-box
Authors: Reyhani-Masoleh, Arash and Taha, Mostafa and Ashmawy, Doaa
Year: 2018
Keywords: Not Available
Journal: ARITH 2018
Volume: Not Available
Issue: Not Available
Pages: 145-152
Publisher: IEEE
Local/International: International
Paper Link:
Full paper Doaa Abdelfatah Ashmawy_arithBU.pdf
Supplementary materials Not Available

The AES combined S-box/inverse S-box is a single construction that is shared between the encryption and decryption data paths of the AES. The currently most compact implementation of the AES combined S-box/inverse S-box is Canright's design, introduced back in 2005. Since then, the research community has introduced several optimizations over the S-box only, however the combined S-boxlinverse S-box received little attention. In this paper, we propose a new AES combined S-boxlinverse S-box design that is both smaller and faster than Canright's design. We achieve this goal by proposing to use new tower field and optimizing each and every block inside the combined architecture for this field. Our complexity analysis and ASIC implementation results in the CMOS STM 65nm and NanGate 15nm technologies show that our design outperforms the counterparts in terms of area and speed.

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