Prof. Ayman Ali Ahmed Nada :: Publications:

Proportional-Integral-Plus (PIP) controller can be considered as an extension of classical discrete PI controller, in which, the proportional and the integral actions are enhanced by higher order of input and feedback compensators (PLUS terms). Conventionally, the PIP control design is carried out entirely in discrete time domain, for which open-loop data-based identification and estimation for the linearized transfer function model is performed off-line. This is followed by an on-line implementation for the control operations. In case of on-line estimation of the transfer function model, the overall execution time, at each step, increases considerably. Here, the overall execution time is the sum of each operation, i.e. estimation and control implementation. In such cases, digital processors with single resources may fail to capture relatively fast mechatronic systems properly, causing a decrease in the controller performance. This paper investigates the use of parallel processing facilities available within the Field Programmable Gate Arrays (FPGAs) technology and reconfigurable Input/output chips, PIP- FPGA, for which a fixed-point PIP control design algorithm is developed and implemented upon relatively fast Mechatronic system with high-speed control and high channel count on an FPGA target. Here, parallel loops for measuring feedback signals, model parameter estimation, updating of the control gains, and generating pulse train for actuator's drivers, are illustrated through experimental test- rig of simple automation line system. The experimental results shows valuable enhancement of the implemented PIP control upon such mechatronic systems.