Many Processor Systems-on-Chip (MPSoC) have become tremendously complex systems. They are more sensitive to variability with technology scaling, which complicates the system design and impact the overall performance. Energy consumption is also of great interest for mobile platforms powered by battery and power management techniques, mainly based on Dynamic Voltage and Frequency Scaling (DVFS) algorithms, become mandatory. A Globally Asynchronous Locally Synchronous (GALS) design alleviate such problems by having multiple clocks, each one being distributed on a small area of the chip (called island), whereas an Asynchronous Network-on-Chip (ANoC) allow to communicate between the different islands. A robust technique is proposed to deal with a GALS-ANoC architecture under process variability constraints using advanced automatic control methods. The approach relaxes the fabrication constraints and help to the yield enhancement. Moreover, energy savings are Network-on-Chip (ANoC) allow to communicate between the different islands. A robust technique is proposed to deal with a GALS-ANoC
architecture under process variability constraints using advanced automatic control methods. . The approach relaxes the fabrication constraints and help to the yield enhancement. Moreover, energy savings are even better for the same perceived performance with the obtained variability robustness. The case study is an island based on a MIPS R2000 processor implemented in STMicroelectronics 45nm technology and validated with fine-grained simulations. |
