You are in:Home/Publications/16-bit RISC Cryptographic Processor Architecture for Security Operations on Virtex5 FPGA

Dr. mahabah daowd :: Publications:

Title:
16-bit RISC Cryptographic Processor Architecture for Security Operations on Virtex5 FPGA
Authors: Mahaba saad aziz, Khalid Youssef , Hala Abdel-Kader, Mohamed Tarek
Year: 2016
Keywords: Cryptographic Processor, DES, 3DES, AES, Blowfish, RC5, RC6, Data Encryption, FPGA
Journal: International Electrical Engineering Journal (IEEJ)
Volume: 7
Issue: 6
Pages: 2286-2291
Publisher: Not Available
Local/International: International
Paper Link: Not Available
Full paper Not Available
Supplementary materials Not Available
Abstract:

Security is one of the most important features in data communication due to the rapid evolution of communication systems offers and to a very large percentage of population, access to a huge amount of information and a variety of means to use in order to exchange personal data. Cryptographic algorithms are mainly used for this purpose to obtain confidentiality and integrity of data in communication. This paper provides a dynamic crypto processor used for some symmetric key cryptographic ciphers (DES, 3DES, AES, Blowfish, RC5, and RC6). Also, provides an implementation of 16bit cryptographic processor that performs logical operations and arithmetic operations like rotate shift left, modular addition 2^16, S_box operation, and key expansion operation on virtex5, xc5vlx50-3ff324 FPGA. Simulation results show that developed processor working with high Speed, low power, and low delay time.

Google ScholarAcdemia.eduResearch GateLinkedinFacebookTwitterGoogle PlusYoutubeWordpressInstagramMendeleyZoteroEvernoteORCIDScopus