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Ass. Lect. Nada Elmeligy :: Publications:

Title:
130nm Low power asynchronous AES core
Authors: N El-meligy; M Amin; E Yahya and Y Ismail
Year: 2017
Keywords: Asynchronous circuits;Ciphers;Encryption;Power demand;Protocols;Standards
Journal: Conference: Circuits and Systems (ISCAS)
Volume: Not Available
Issue: Not Available
Pages: 4
Publisher: IEEE
Local/International: International
Paper Link:
Full paper Nada Elmeligy_130nm Low Power Asynchronous AES Core.pdf
Supplementary materials Not Available
Abstract:

Internet of Things (IoT) devices are always having low power budget and high security demands. This paper describes the design and results of fabricated Advanced Encryption Standard (AES) chip in UMC 130 nm CMOS technology by using Faraday standard cells. The AES core is designed in fully QDI asynchronous circuit style. The core ciphers 128-bit data/key in 300 ns and consumes 5.47 mW.

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